• 師資陣容

    • 行政技術人員

吳凱強 Kai-Chiang Wu 助理教授
  • 美國卡內基美隆大學資訊工程博士
  • 工程三館 530
  • 03-5712121 # 54734

經歷

1.Software Engineer, Design Technology Solutions, Intel Corporation, 08/2011 – 07/2013
2.Research Assistant, Energy Aware Computing (EnyAC) Group, Carnegie Mellon University, 08/2006 – 07/2011

研究興趣

IoT之電腦輔助設計、SoC設計自動化、高效節能計算、可靠系統設計

實驗室

研究計畫

  

代表著作

1. Kai-Chiang Wu and Diana Marculescu, “Power-Planning-Aware Soft Error Hardening via Selective Voltage Assignment,” IEEE Transactions on Very Large Scale Integration Systems. (in press)
2. Kai-Chiang Wu and Diana Marculescu, “A Low-Cost, Systematic Methodology for Soft Error Robustness of Logic Circuits,” IEEE Transactions on Very Large Scale Integration Systems, Feb. 2013.
3. Kai-Chiang Wu, Ming-Chao Lee, Diana Marculescu, and Shih-Chieh Chang, “Mitigating Lifetime Underestimation: A System-Level Approach Considering Temperature Variations and Correlations between Failure Mechanisms,” in Proc. of Design, Automation, and Test in Europe Conference (DATE), March 2012.
4. Kai-Chiang Wu and Diana Marculescu, “Joint Logic Restructuring and Pin Reordering against NBTI-Induced Performance Degradation,” in Proc. of Design, Automation, and Test in Europe Conference (DATE), April 2009.
5. Natasa Miskov-Zivanov, Kai-Chiang Wu, and Diana Marculescu, “Process Variability-Aware Transient Fault Modeling and Analysis,” in Proc. of International Conference on Computer-Aided Design (ICCAD), Nov. 2008.
6. Kai-Chiang Wu and Diana Marculescu, “Power-Aware Soft Error Hardening via Selective Voltage Scaling,” in Proc. of International Conference on Computer Design (ICCD), Oct. 2008. (Best Paper Award)
7. Shih-Chieh Chang, Cheng-Tao Hsieh, and Kai-Chiang Wu, “Re-synthesis for Delay Variation Tolerance,” in Proc. of Design Automation Conference (DAC), June 2004.