• 師資陣容

    • 行政技術人員

游逸平 Yi-Ping You 副教授
  • 清華大學資訊工程博士
  • 工程三館 708
  • 03-5712121 # 56688

經歷

1. 國立交通大學資訊工程學系助理教授,2008-迄今

研究興趣

編譯器設計與最佳化、系統軟體、嵌入式系統

實驗室

  • 系統軟體實驗室
  • 電子資訊大樓 703
  • 03-5712121 # 56674

研究計畫

1. JavaScript Engine效能改進研究案(2013),資策會
2. 在異質多核心平台上OpenCL架構中資源管理之研究(2011-2014),國科會
3. shader碼最佳化技術研究(2011),資策會
4. 適用於嵌入式環境之shader碼編譯技術(2010),資策會
5. 資訊產品安全檢測技術整合型研究(2009-2010),中科院
6. 多執行緒程式之漏電耗能管理方法(2008-2011),國科會

代表著作

1. Yi-Ping You, Shen-Hong Wang, ``Energy-Aware Code Motion for GPU Shader Processors,'' accepted, ACM Transactions on Embedded Computing Systems.
2. Tsan-Rong Tien and Yi-Ping You, ``Enabling OpenCL Support for GPGPU in Kernel-based Virtual Machine,'' published online on 22 Nov. 2012, Software: Practice and Experience, John Wiley & Sons, Ltd.
3. Yi-Ping You and Yu-Shiuan Tsai, ``Compiler-Assisted Resource Management for CUDA Programs,'' in Proceedings of the 16th Workshop on Compilers for Parallel Computing (CPC'12), Podava, Italy, January 11-13, 2012.
4. Chia Han Lu, Young-Chia Lin, Yi-Ping You, and Jenq-Kuen Lee, ``LC-GRFA: Global Register File Assignment with Local Consciousness for VLIW DSP Processors with Non-uniform Register Files,'' Concurrency and Computation: Practice and Experience, Special Issue on CPC 2007, Vol. 21, No. 1, pp. 101-114, John Wiley & Sons, Ltd., January 2009.
5. Yung-Chia Lin, Chia Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chiao Moo, and Jenq Kuen Lee, ``Effective Code Generation for Distributed and Ping-Pong Register Files: a Case Study on PAC VLIW DSP Cores,'' Journal of VLSI Signal Processing Systems, Vol. 51, No. 3, pp. 269-288, Springer Netherlands, June 2008.
6. Yung-Chia Lin, Yi-Ping You, and Jenq Kuen Lee, ``PALF: Compiler Supports for Irregular Register Files in Clustered VLIW Processors,'' Concurrency and Computation: Practice and Experience, Special Issue on CPC 2006, Vol. 19, Issue 18, pp. 2391-2406, John Wiley & Sons, Ltd., December 2007.
7. Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, and Ting-Ting Hwang, ``Energy-Aware Scheduling and Simulation Methodologies for Parallel Security Processors with Multiple Voltage Domains,'' Journal of Supercomputing, Vol. 42, No. 2, pp. 201-223, Springer, November 2007.
8. Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Yung-Chia Lin, Yi-Ping You, Chia-Han Lu, and Jenq-Kuen Lee, ``Enabling Compiler Flow for Embedded VLIW DSP Processors with Distributed Register Files,'' ACM SIGPLAN Notices, ACM LCTES 2007 Issue, Vol. 42, Issue 7, pp. 146-148, ACM, July, 2007.
9. Yi-Ping You, Chung-Wen Huang, and Jenq Kuen Lee, ``Compilation for Compact Power-Gating Controls,'' ACM Transactions on Design Automation of Electronic Systems, Vol. 12, Issue 4, Article 51, ACM, New York, September 2007.
10. Yi-Ping You, Chingren Lee, and Jenq Kuen Lee, ``Compilers for Leakage Power Reduction,'' ACM Transactions on Design Automation of Electronic Systems, Vol. 11, Issue 1, ACM, New York, pp. 147-164, January 2006.